In the semiconductor device which is intended for, for example, the power semiconductor module, with an increase in current capacity and the density of components and a reduction in the size of the module, the amount of current flowing through wiring lines in the package has increased and it is necessary to improve the radiation performance of the module. In addition, in many cases, a lead frame using a copper plate is used, instead of aluminum wire bonding according to the related art, in order to reduce wiring inductance.
FIGS. 6(A), 6(B) are a vertical cross-sectional view and a plan view illustrating a semiconductor device according to the related art.
FIG. 6(A) is a vertical cross-sectional view taken along the line A-A of FIG. 6(B). An insulating substrate 1 made of, for example, ceramic is a DBC (Direct Bonding Copper) substrate having conductor patterns 2a, 2b bonded to both surfaces thereof. In addition, a semiconductor chip 3 is mounted on the conductor pattern 2a which is formed as a copper circuit on the front surface of the insulating substrate 1 by soldering. The conductor pattern 2b, which has the same thickness as the conductor pattern 2a and is bonded to the rear surface of the insulating substrate 1, is bonded to a heat-dissipating base member 4 such that heat generated from the semiconductor chip 3 is dissipated to the outside. The heat-dissipating base member 4 forms the bottom of a resin case 5 and two large and small insulating substrates 1 are bonded to the heat-dissipating base member 4. The semiconductor chip 3, an internal connection terminal 7, and an aluminum wire 8 are protected by a gel-like sealing member 6 which is filled in the resin case 5.
FIG. 6(B) is a plan view illustrating the state of the semiconductor device before the sealing member 6 is filled. Metal electrodes 3a, 3b of the semiconductor chip 3 are internally connected to predetermined portions of the conductor pattern 2a by the internal connection terminal 7 and the aluminum wire 8. In addition, a plurality of external lead terminals 9a, 9b is drawn from the conductor pattern 2a to the upper surface of the resin case 5. The internal connection terminal 7 and the external lead terminals 9a, 9b are lead frames obtained by processing copper plates.
In the semiconductor device such as a module-type power semiconductor device, an intelligent power module, or a discrete semiconductor product, the metal electrodes 3a, 3b of the semiconductor chip 3 and the internal connection terminal 7 and also the internal connection terminal 7 and the conductor pattern 2a fixed to the insulating substrate 1 are wired inside the device, and the external lead terminals 9a, 9b are drawn to the outside of the device. In the semiconductor device, in general, the semiconductor chip 3 and the conductor pattern 2a, the conductor pattern 2b and the heat-dissipating base member 4, or the conductor pattern 2a and the internal connection terminal 7 or the external lead terminals 9a, 9b are connected to be wired by, for example, soldering, brazing, ultrasonic bonding, or laser welding. In addition, in general, components of the semiconductor device have a square shape or a rectangular shape and are formed by bonding metal materials with different thermal expansion coefficients.
Next, a crack which occurs when bonding members with different thermal expansion coefficients are bonded to each other by, for example, solder will be described.
In a case in which metal members with different thermal expansion coefficients are connected to each other, when the environmental temperature thereof repeatedly increases and decreases, the metal members are expanded and contracted at different rates. That is, stress is repeatedly applied to a fixing layer which is made of, for example, solder or a brazing filler metal and bonds the metal members and a crack is likely to occur in the fixing layer.
FIG. 7 is a cross-sectional view illustrating a state in which two metal members are bonded to each other by a solder fixing layer.
In FIG. 7, the X-axis represents the length direction of the members and the Y-axis represents the thickness direction of the members. It is assumed that first and second metal members 11, 12 have different thermal expansion coefficients α1, α2 (α1<α2) and have longitudinal elastic moduli E1, E2, respectively. In addition, it is assumed that a fixing layer 13 is a solder layer with a shear elastic modulus Gc and has a thickness h.
As illustrated in FIG. 7, a solder fillet is formed in an outer circumferential portion of the fixing layer 13, in a state in which the second metal member 12 is bonded to the first metal member 11 through the fixing layer 13 made of solder. In general, it has been known that the second metal member 12 with a length L and a thickness t2 is bonded to the first metal member 11 with a thickness t1 and the shear strain rate (Δγ) of the solder of the fixing layer 13 when a temperature variation of T[° C.] occurs in the bonded structure is calculated by the following Expression 1.Δγ≈(L/2)·(α2−α1)·T/{(√A)·h}  [Expression 1]
(where, a coefficient A is Gc/h·{1/(E2·t2)+1/(E1·t1)}).
According to Expression 1, as the thicknesses t1, t2 of the first and second metal members 11, 12 and the length L of the second metal member 12 increase, stress is applied to the fixing layer 13 at a larger shear strain rate Δγ. In addition, as it can be seen from Expression 1, as the thickness h of the fixing layer 13 made of solder is reduced, the shear strain rate Δγ increases. Therefore, as the thickness of the fixing layer 13 made of solder is reduced, a crack is more likely to occur in the fixing layer 13 made of solder.
FIGS. 8(A), 8(B) are the ultrasound pictures of a crack which occurs in the solder fixing layer in the temperature cycle test. FIGS. 8(A), 8(B) illustrate cracks which occur when components are repeatedly expanded and contracted in, for example, the temperature cycle reliability test in a state in which the conductor patterns 2b formed on the rear surfaces of the two large and small insulating substrates 1 illustrated in FIGS. 6(A), 6(B) are fixed to the heat-dissipating base member 4 by soldering.
In FIGS. 8(A), 8(B), the progression direction of the crack which occurs in each of the fixing layers 13a, 13b is represented by an arrow. In the ultrasound picture of the fixing layer 13a illustrated in FIG. 8(A), which has a square shape in a plan view, a region corresponding to a portion of the solder in which a crack occurs is represented as a large white area.
As above, in the semiconductor device in which the lower surface of the conductor pattern 2b corresponding to the metal member 12 illustrated in FIG. 7 is soldered to the heat-dissipating base member 4 corresponding to the metal member 11, a large shear strain occurs at the corners of the fixing layer 13, which causes a crack to occur from the corners to the center of the bonding portion. When the crack, which occurred at the corners of the insulating substrate 1, reaches a bonding surface to the semiconductor chip 3, a heat flux from the insulating substrate 1 to the heat-dissipating base member 4 is blocked by the crack. Therefore, the radiation performance of the semiconductor chip 3 for radiating the generated heat deteriorates. As a result, the junction temperature of an element abnormally increases, which leads to thermal fracture.
The following Patent Literature 1 discloses a semiconductor device with the following connection structure. When the thickness of a solder layer is small, fatigue breakdown occurs rapidly due to thermal stress which is applied to a soldering portion due to the difference in thermal expansion between an insulating substrate and a lead frame due to a heat cycle in a usage environment. Therefore, a protrusion is formed on a soldering surface of the copper circuit pattern of the lead frame or the insulating substrate to prevent a variation in the thickness of the solder layer.
Furthermore, Patent Literature 2 discloses a structure in which, in order to reduce stress applied to a bonding portion, chamfered portions are formed at four corners of a substrate or a slit is formed in a conductor pattern. In this structure, thermal stress which is applied to the bonding portion due to a thermal cycle is reduced to increase the time until a crack occurs, thereby preventing the growth of the crack.